Neuromorphic and spiking: implementation evidence

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Neuromorphic systems place event-driven state and communication near neuron-like compute elements. The row includes digital and mixed-signal embodiments; it does not require literal biological fidelity.

Stage Mark Summary
Reference Mature simulators and programming environments
Physical Purpose-built neuromorphic chips
Integrated Cores, memory, event routing, and control
Scaled Hala Point combines 1,152 Loihi 2 processors
Access Research-community access
Operational Recurring research workloads, not general deployment

Reference — demonstrated

Claim
The matrix credits neuromorphic and spiking at the Reference stage: mature simulators and programming environments.
Evidence
Spiking-network simulators, compilers, and Loihi’s software environment expose executable neuron, synapse, and event-routing semantics. This supplies a stable target before custom hardware is considered.
Criticism
Executable semantics do not establish purpose-built hardware, integration, scale, external access, recurring use, or comparative advantage.
Sources
Intel Hala Point announcement

Physical — demonstrated

Claim
The matrix credits neuromorphic and spiking at the Physical stage: purpose-built neuromorphic chips.
Evidence
Loihi 2 and other neuromorphic chips implement event-driven neural operations in purpose-built CMOS. They are not merely neural simulators running as ordinary CPU instruction streams.
Criticism
A physical realization does not by itself establish system integration, efficient scaling, external access, recurring use, or comparative advantage.
Sources
Intel Hala Point announcement

Integrated — demonstrated

Claim
The matrix credits neuromorphic and spiking at the Integrated stage: cores, memory, event routing, and control.
Evidence
Neuromorphic cores combine local state, programmable neuron behavior, synaptic memory, asynchronous event communication, and host control. The host remains important, but the neural subsystem is a coherent machine.
Criticism
A coherent system does not by itself establish efficient scaling, external access, recurring use, or comparative advantage.
Sources
Intel Hala Point announcement

Scaled — demonstrated

Claim
The matrix credits neuromorphic and spiking at the Scaled stage: hala Point combines 1,152 Loihi 2 processors.
Evidence
Intel’s Hala Point combines 1,152 Loihi 2 processors and reports capacity equivalent to 1.15 billion neurons. That demonstrates a large interconnect and system composition, not general application advantage.
Criticism
Composition at the reported scale does not establish useful scaling across workloads, favorable economics, or comparative advantage.
Sources
Intel Hala Point announcement

Access — limited

Claim
The matrix credits neuromorphic and spiking only partially at the Access stage: research-community access.
Evidence
Intel makes Loihi systems available through its neuromorphic research community rather than as an unrestricted commodity computer. Outsiders can program the hardware, but admission and workloads are constrained.
Criticism
The mark is limited on the current public record: research-community access. Access does not establish broad availability, recurring use, workload generality, or comparative advantage.
Sources
Intel Hala Point announcement

Operational — limited

Claim
The matrix credits neuromorphic and spiking only partially at the Operational stage: recurring research workloads, not general deployment.
Evidence
The systems repeatedly run research workloads in optimization, sensing, robotics, and sparse neural computation. The mark remains limited because broad production use and independently reproduced end-to-end advantage have not been established.
Criticism
The mark is limited on the current public record: recurring research workloads, not general deployment. Recurring work does not establish workload generality, independent reproduction, favorable economics, or comparative advantage.
Sources
Intel Hala Point announcement

Source