Photonic analog computing: implementation evidence

← Return to the implementation matrix

Photonic analog computing uses optical propagation and interference to perform operations, usually matrix algebra. The row concerns computation, not optical communication by itself.

Stage Mark Summary
Reference Executable optical-network models and training methods
Physical Fabricated photonic neural-network chip
Integrated Linear and nonlinear optical operations on one chip
Scaled Multi-layer demonstration at small model scale
Access No public programmable system located
Operational No recurring external deployment located

Reference — demonstrated

Claim
The matrix credits photonic analog computing at the Reference stage: executable optical-network models and training methods.
Evidence
Optical meshes and neural-network mappings can be simulated, trained, and calibrated on conventional hosts. The cited work also implements an in-situ, forward-only training method, providing an executable connection between the model and the device.
Criticism
Executable semantics do not establish purpose-built hardware, integration, scale, external access, recurring use, or comparative advantage.
Sources
Single-chip photonic deep neural network

Physical — demonstrated

Claim
The matrix credits photonic analog computing at the Physical stage: fabricated photonic neural-network chip.
Evidence
The Nature Photonics system is a fabricated photonic integrated circuit. Optical processor units physically perform the matrix operations rather than merely carrying data between electronic processors.
Criticism
A physical realization does not by itself establish system integration, efficient scaling, external access, recurring use, or comparative advantage.
Sources
Single-chip photonic deep neural network

Integrated — demonstrated

Claim
The matrix credits photonic analog computing at the Integrated stage: linear and nonlinear optical operations on one chip.
Evidence
Multiple coherent optical processor units and nonlinear activation functions are monolithically integrated on one chip. The demonstrated three-layer network computes both linear and nonlinear functions optically.
Criticism
A coherent system does not by itself establish efficient scaling, external access, recurring use, or comparative advantage.
Sources
Single-chip photonic deep neural network

Scaled — limited

Claim
The matrix credits photonic analog computing only partially at the Scaled stage: multi-layer demonstration at small model scale.
Evidence
The device integrates several stages, but the reported network has six neurons and three layers. That is sufficient to test composition, not enough to establish scaling to useful modern models once lasers, conversion, control, calibration, and thermal stability are counted.
Criticism
The mark is limited on the current public record: multi-layer demonstration at small model scale. Composition at the reported scale does not establish useful scaling across workloads, favorable economics, or comparative advantage.
Sources
Single-chip photonic deep neural network

Stages not credited

The experimental chip is not offered as an externally programmable service or appliance, and no recurring operational deployment was located.

Source